1. Field of the Invention
The present invention relates to a semiconductor circuit installed in a wireless receiver apparatus such as a portable telephone, and to a wireless receiver apparatus including the semiconductor circuit for wireless receiving.
2. Description of the Related Art
Recently, various wireless receiver circuits have been installed in portable devices such as portable telephones driven with batteries, and such a demand has risen for greatly reducing consumption of power consumed in a wireless receiver circuit. However, power consumption of a receiver circuit for analog television broadcasting employed in an analog television broadcasting receiver according to a prior art is from several hundreds of milliwatts to over one watt, and the receiver circuit for the analog television broadcasting is unsuitable for a portable device driven with a battery. For example, in a receiver circuit for digital television broadcasting to be used in a future portable telephone, power consumption thereof is now required to be greatly smaller than the power consumption formerly required. The power consumption of, for example, 100 mW or smaller is required for the receiver circuit for digital television broadcasting. In order to meet this demand, most of circuits constituting a wireless receiver circuit are incorporated in a semiconductor integrated circuit. In this case, power consumption of the wireless receiver circuit depends on that of the semiconductor integrated circuit. For example, by reducing a power source voltage supplied to the wireless receiver circuit, the power consumption of the wireless receiver circuit can be reduced. However, a battery is often used as a power source of the portable device. Further, in view of efficiency for lowering a voltage of the battery, reduction in the power consumption is not always realized efficiently.
On the other hand, in a wireless receiver circuit including a high frequency circuit that includes a high frequency amplifier, a mixer, a local oscillator, a frequency divider, an intermediate frequency circuit and the like, a low frequency circuit, and a bias circuit, a frequency of a signal processed in the high frequency circuit is higher than those of signals processed in the lower frequency circuit and the bias circuit. In addition, a bias current flowing through the high frequency circuit is larger than bias currents flowing through the low frequency circuit and the bias current. The reasons are as follows. The resistance values of the resistors formed in the high frequency circuit are often set to be smaller so as to increase a bias current value, in order to lessen an influence of a parasitic capacity in the semiconductor integrated circuit. Further, important characteristics of a wireless receiver circuit such as a gain, a noise index, a dynamic range are generally more improved when the bias current value is larger. Accordingly, it is rather effective to reduce the bias current flowing through the high frequency circuit rather than to reduce the bias current flowing through the low frequency circuit and the bias circuit, in order to reduce the power consumption of the wireless receiver circuit.
Each of Japanese patent laid-open publication No. JP-9-107299-A and Japanese Patent No. 2766230 discloses a receiving amplifier apparatus including amplification means to which a bias current is applied for amplifying a received signal; received electric field detection means for detecting a received electric field level of the received signal; and control means for controlling the bias current according to the level of the received field so that a mutual modulation distortion falls in an allowable range and so as to realize low power consumption.
However, the manufacturing processes of the semiconductor integrated circuits varies relatively, and there are variations in the resistance values of the resistors and the current amplification factors of the transistors formed in the respective semiconductor integrated circuits. Accordingly, generally, the power consumption of the semiconductor integrated circuits vary from less than −20% to more than 20%, and a minimum value and a maximum value of the current consumption of the semiconductor integrated circuits often vary by a factor of 1.5 or more. Further, the circuit characteristics of the high frequency circuit often depend on the bias current value. In particular, if the bias current is excessively reduced, a fatal problem of oscillation stop occurs in an oscillator circuit such as a local oscillator included in the high frequency circuit. Due to this, reduction in current consumption is restricted by a lower limit of the variation in the consumed current, and this leads to one of problems in reduction in the power consumption. However, the receiving amplifier apparatus disclosed in each of the Japanese patent laid-open publication No. JP-9-107299-A and Japanese Patent No. 2766230 has no measures against the variation in current consumption. Further, the receiving amplifier apparatus disclosed in each of the Japanese patent laid-open publication No. JP-9-107299-A and Japanese Patent No. 2766230 has a disadvantage of inability to further reducing the power consumption since the bias current is always controlled while the receiving amplifier apparatus operates.